专利名称:MEMORY MODULE, MEMORY SYSTEM, AND
DATA PROCESSING SYSTEM
发明人:Seiji Miura,Akira Yabu,Yoshinori Haraguchi申请号:US11748936申请日:20070515
公开号:US20070271409A1公开日:20071122
专利附图:
摘要:A user-friendly data processing system apparatus which ensures the
expandability of memory capacity and high speed processing with low cost is provided.The data processing system is composed of a data processing unit, a volatile memory and
a nonvolatile memory. The data processing unit, the volatile memory and the nonvolatilememory are connected in series and by reducing the number of connection signals fastprocessing is realized while maintaining the memory capacity expandability. Upontransferring a data of the nonvolatile memory to the volatile memory, an error
correction is executed, therefore, the reliability is improved. The data processing systemcomposed of the plurality of memory chips is formed as a data processing systemmodule in which the each chips are stacked and arranged, and wiring is formed by ballgrid array (BGA) and bonding between the chips.
申请人:Seiji Miura,Akira Yabu,Yoshinori Haraguchi
地址:Hachioji JP,Tokyo JP,Tokyo JP
国籍:JP,JP,JP
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